Publications of Eisenreich, H.
Select a view.4 publication entries, 0 of them (printed in bold in the list) acknowledge the project support.
Conference contribution: poster
| Ehrlich et al. 2007 | Ehrlich, M., Mayr, C., Eisenreich, H., Henker, S., Srowig, A., Gruebl, A., Schemmel, J. and Schüffny, R. | Wafer-scale VLSI implementations of pulse coupled neural networks | International Conference on Sensors, Circuits and Instrumentation Systems (SSD-07), Hammamet-Tunisia 2007, p. 409 ff., electronic publication. | fulltext |
| Eisenreich et al. 2007 | Eisenreich, H., Mayr, C., Henker, S., Wickert, M., and Schüffny, R. | A Programmable Clock Generator HDL Softcore | Proceedings of IEEE Midwestern Symposium on Circuits and Systems (MWSCAS07), p. 1-4 | fulltext |
| Mayr et al. 2006 | Mayr, C., Eisenreich, H., Schreiter, J. and Schüffny, R. | Pulse Capture and Distribution for Neural Pulse-based Computations | Dresdner Arbeitstagung Schaltungs- und Systementwurf 2006, p. 85-90 | fulltext |
| Mayr et al. 2006b | Mayr, C., Eisenreich, H., Henker, S. and Schüffny, R. | Pulsed multi-layered Image filtering: a VLSI Implementation | Proceedings of World Academy of Science, Engineering and Technology, Vol. 15 Oct. 2006 | fulltext |
