Publications of Fieres, J.

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5 publication entries, 1 of them (printed in bold in the list) acknowledge the project support.
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Conference contribution: poster

Paper (reviewed)

Bruederle et al. 2011Brüderle, D., Petrovici, M.A., Vogginger, B., Ehrlich, M., Pfeil, T., Millner, S., Grübl, A., Wendt, K., Müller, E., Schwartz, M.O., de Oliveira, D.H., Jeltsch, S., Fieres, J., Schilling, M., Müller, P., Breitwieser, O., Petkov, V., Muller, L., Davison, A.P., Krishnamurthy, P., Kremkow, J., Lundqvist, M., Muller, E., Partzsch, J., Scholze, S., Zühl, L., Mayr, C., Destexhe, A., Diesmann, M., Potjans, T.C., Lansner, A., Schüffny, R., Schemmel, J. and Meier, K.A comprehensive workflow for general-purpose neural modeling with highly configurable neuromorphic hardware systems.Biol Cybern. (2011) 104(4-5):263-96
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Schemmel et al. 2008aSchemmel, J., Fieres, J. and Meier, K.Realizing Biological Spiking Network Models in a Configurable Wafer-Scale Hardware System IEEE International Joint Conference on Neural Networks IJCNN (2008) : 969-976
abstract, BibTeX
Schemmel et al. 2008bSchemmel, J., Fieres, J. and Meier, K.Wafer-Scale Integration of Analog Neural Networks IEEE International Joint Conference on Neural Networks IJCNN (2008) : 431-438
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Conference contribution: poster

Fieres et al. 2006Fieres, J., Schemmel, J. and Meier, K.Training convolutional networks of threshold neurons suited for low-power hardware implementationProceedings of the 2006 International Joint Conference on Neural Networks (IJCNN 2006), 21--28, IEEE Press (2006) abstract, fulltext
Fieres et al. 2006bFieres, J., Meier, K. and Schemmel, J.A convolutional neural network tolerant of synaptic faults for low-power analog hardwareProceedings of 2nd IAPR International Workshop on ArtificialNeural Networks in Pattern Recognition (ANNPR 2006), Lecture Notes in Artificial Intelligence 4087, 122-132, Springer (2006) abstract, fulltext


3 August 2011