Publications of Henker, S.
Select a view.8 publication entries, 0 of them (printed in bold in the list) acknowledge the project support.
Conference contribution: poster
| Ellguth, G., Mayr, C., Henker, S. and Schüffny, R. | Design techniques for deep submicron CMOS / Case study Delta-Sigma-Modulator | Dresdner Arbeitstagung Schaltungs- und Systementwurf 2006, p. 35-40 | ||
| Henker, S., Schlüßler, J.-U. and Schüffny, R. | White Balancing with Multi-Channel CMOS Sensors | Proceedings Image and Vision Computing New Zealand 2005, University of Otago, Dunedin, p. 37-42 | ||
| Ehrlich et al. 2007 | Ehrlich, M., Mayr, C., Eisenreich, H., Henker, S., Srowig, A., Gruebl, A., Schemmel, J. and Schüffny, R. | Wafer-scale VLSI implementations of pulse coupled neural networks | International Conference on Sensors, Circuits and Instrumentation Systems (SSD-07), Hammamet-Tunisia 2007, p. 409 ff., electronic publication. | fulltext |
| Eisenreich et al. 2007 | Eisenreich, H., Mayr, C., Henker, S., Wickert, M., and Schüffny, R. | A Programmable Clock Generator HDL Softcore | Proceedings of IEEE Midwestern Symposium on Circuits and Systems (MWSCAS07), p. 1-4 | fulltext |
| Mayr et al. 2006b | Mayr, C., Eisenreich, H., Henker, S. and Schüffny, R. | Pulsed multi-layered Image filtering: a VLSI Implementation | Proceedings of World Academy of Science, Engineering and Technology, Vol. 15 Oct. 2006 | fulltext |
| Mayr et al. 2007 | Mayr, C. and Ehrlich, M. and Henker, S. and Wendt, K. and Schüffny, R. | Mapping Complex, Large Scale Spiking Networks on Neural VLSI | Int. Journal of Applied Science, Engineering, and Technology (2007) 4(1): 37-42 | fulltext |
| Noack et al. 2010 | Noack, M., Partzsch, J., Mayr, C., Henker, S. and Schüffny, R. | Biology-Derived Synaptic Dynamics and Optimized System Architecture for Neuromorphic Hardware | IEEE International Conference on Mixed Design of Integrated Circuits and Systems MIXDES 2010, pp. 219-224 | |
| Scholze et al. 2010 | Scholze, S., Henker, S., Partzsch, J., Mayr, C. and Schüffny, R. | Optimized Queue Based Communication in VLSI Using a Weakly Ordered Binary Heap | IEEE International Conference on Mixed Design of Integrated Circuits and Systems MIXDES 2010, pp. 316-320 |
